1. Technical Field to which the Invention Belongs
The present invention relates to a voltage-controlled oscillator, a clock converter, and an electronic device and, more specifically, it relates to a voltage-controlled oscillator using a SAW resonator and having little frequency fluctuations caused by itself, a clock converter for converting a fundamental clock signal on the order of several kHz (e.g. 8 kHz) to a high-frequency clock signal of several hundred MHz (e.g. 622.08 MHz), and an electronic device using the clock converter.
2. Related Art
Communication equipment such as cellular phones transmits and receives communication data according to clock signals from oscillators. Market requirements have shifted to a high frequency band exceeding 400 MHz with an increasing trend to broadband communication networks. Data are now transmitted and received in this high frequency band. From the demand for higher communication speed, as for the recent electronic equipment including the communication equipment, high-frequency oscillators to have high frequency stability in a high-frequency band, to compensate the temperature in a practical temperature range of the communication equipment, and to have little jitter in the clock signal outputted from the high-frequency oscillator, is required. Particularly, high-frequency oscillators with extremely low jitter and high stability have been required to prevent the occurrence of communication errors due to the jitter of the high-frequency oscillators in the sharply growing high-speed network market including Ethernet (registered trademark), a fiber channel and so on using a gigabit band.
FIG. 22 is a circuit diagram of the structure of a conventional and general Colpitts voltage-controlled oscillator.
Colpitts voltage-controlled SAW oscillators (VCSOs) 1C using surface acoustic wave (SAW) resonators have recently been used as the voltage-controlled oscillators, as shown in FIG. 22. The SAW resonators work as resonators which have interdigital excitation electrodes and a ladder-form reflector on a piezoelectric substrate and reflect a surface wave excited by the excitation electrodes with the reflector to generate standing waves. The SAW resonators have the advantage of having no resonance point except at a specified frequency, as compared with later-described quartz crystal oscillators, because their oscillating energy is localized on the surface of the SAW resonators to make it difficult to couple with secondary vibrations other than main vibrations. The SAW resonators have resonance frequencies of several hundred MHz to several GHz and are used in high-frequency oscillation circuits.
Known voltage-controlled SAW oscillators (VCSOS) include one having a capacitive reactance circuit 5 including a variable capacitance diode 51, as shown in JP-A-6-061846 (Paragraph 0006, FIG. 1), to compensate the temperature of the voltage-controlled SAW oscillator (VCSO).
Also AT-cut quartz crystal resonators (hereinafter, referred to as AT quartz crystal resonators) which oscillate at several tens of MHz have been used as the oscillation devices of the voltage-controlled oscillators, such as voltage-controlled quartz crystal oscillators (VCXOs).
FIG. 23 is a block diagram of a general voltage-controlled quartz crystal oscillator. In FIG. 23, the voltage-controlled crystal oscillator (VCXO) 1D includes an oscillating section 84 having an AT quartz crystal resonator which oscillates at several tens of MHz and a Colpitts oscillation circuit 81, a multiplexer circuit 82, and a differential conversion circuit 83. The Colpitts oscillation circuit 81 can vary the oscillation frequency in a specified range by the input of an external control voltage Vc. The AT quartz crystal resonator has a limitation of the above-described 155 MHz and as such, includes the multiplexer circuit 82 to output a high-frequency signal of several hundred MHz or more. For example, as shown in FIG. 23, the Colpitts oscillation circuit 81 multiplies the frequency by four times with the multiplexer circuit 82 to output a high-frequency clock signal of 622.08 MHz from a generated clock signal of 155.52 MHz. The voltage-controlled quartz crystal oscillator 1D of FIG. 23 has the differential conversion circuit 83 from which a plurality of outputs is taken to produce a differential output signal, in consideration of the interaction with a load circuit (not shown).
A clock converter for converting a low-frequency clock signal to a high-frequency clock signal, which incorporating the above-described voltage-controlled oscillator (VCO), will now be described.
FIG. 24 is a block diagram of a general clock converter using the voltage-controlled SAW oscillator 1C. A clock converter 50b includes an input frequency divider circuit (division ratio: 1/P) 51, a phase comparator circuit (PD) 52, a loop filter (LF) 53, the voltage-controlled SAW oscillator 1C, a feedback frequency divider circuit (division ratio: 1/N) 54, and a buffer circuit 56. The clock converter 50b adopts the configuration of a general PLL circuit.
A necessary characteristic condition of the clock converter for converting a signal to a high-speed clock signal is that an input clock signal and an output clock signal are in synchronization with each other. Therefore, the conversion ratio of the input clock signal to the output clock signal must be a multiplication of an integral number and the rising and falling of the input clock signal and the output clock signal must coincide with each other. In order to achieve the characteristic conditions, phase synchronization and frequency conversion with a clock converter using a PLL circuit are generally performed. In recent years, a clock converter for high-speed communication has been achieved for converting a fundamental clock signal on the order of several kHz (e.g. 8 KHz) to a high-frequency clock signal of several hundred MHz (e.g. 622.08 MHz) to cope with faster communication speed. As for the clock converter 50b, when a 155.52-MHz clock signal F1 having jitter is inputted to the input frequency divider circuit (division ratio: 1/P) 51, a 622.08-MHz clock signal F2 having reduced jitter is outputted from the buffer circuit 56.
As described above, the clock converter employs the structure of the PLL circuit. Another example of incorporating the structure is a phase synchronization circuit, which feeds a digital-system clock signal, described in JP-A-5-110427 (Paragraph 0010, FIG. 1).
Also an improved SAW resonator whose temperature characteristic is improved (hereinafter, simply referred to as a SAW resonator) has been achieved. Since the SAW resonator uses a quartz crystal strip, cut at an angle that improves the temperature characteristic as compared with the conventional SAW resonators by having a secondary temperature coefficient β of the order of −1.6×10−8, and improves the frequency temperature characteristic to about a half of that of the conventional SAW resonators. The device technique for the SAW resonator is described in Japanese Patent No. 3216137.
The above-described voltage-controlled oscillator and clock converter have the following challenges (problems).
The voltage-controlled SAW oscillator including the conventional SAW resonator has the following problems.
(1) FIG. 25 shows a graph of the comparison of the frequency temperature characteristics of an AT quartz crystal resonator and the conventional SAW resonator. As shown in FIG. 25, the conventional SAW resonator has a larger fluctuation in frequency deviation with respect to the temperature change than that of the AT quartz crystal resonator, thus having the problem of requiring a wider frequency variable range of the voltage-controlled SAW oscillator than that of the voltage-controlled quartz crystal oscillator.
The problems will be specifically described with reference to the clock converter shown in FIG. 24.
It is necessary for the clock converter to control the frequency across a wide frequency variable range in order to synchronize a clock signal F1 having a large amount of jitter, inputted from the outside, with a clock signal F2 with reduced jitter at the output end. The system frequency accuracy (hereinafter, referred to as a system accuracy) in a Synchronous Optical NETwork (SONET) system of the United States is ±20 ppm, within which system accuracy must be compensated. As for the system accuracy, the voltage-controlled SAW oscillator in the clock converter takes the role. For example, a frequency variable range required for the voltage-controlled SAW oscillator to compensate the system accuracy includes the following three factors: the SONET-system accuracy, the frequency deviation of the voltage-controlled SAW oscillator itself (hereinafter, referred to as “own deviation”), and frequency fluctuation due to secular change of the voltage-controlled SAW oscillator (hereinafter, referred to as secular change).
The frequency deviation of the voltage-controlled SAW oscillator itself includes frequency deviation in manufacturing (what is called manufacturing variations) and frequency deviation due to own temperature variations shown in FIG. 25. The same situation is considered for the frequency variable range for the voltage-controlled quartz crystal oscillator. Out of the own deviation, the frequency deviation due to temperature change is of the order of 20 ppm for the AT quartz crystal resonator and 60 ppm for the conventional SAW resonator, when the temperature change is in an operating temperature range, as shown in FIG. 25.
(2) The voltage-controlled SAW oscillator has the problem of requiring a wider frequency variable range than that for the voltage-controlled quartz crystal oscillator to compensate the system accuracy due to frequency fluctuations caused by itself.
The problem of the respective frequency variable ranges of the voltage-controlled SAW oscillator and the voltage-controlled quartz crystal oscillator will be specifically described by making a trial calculation.
The frequency variable range of the voltage-controlled SAW oscillator is expressed by system accuracy+own deviation+secular change=±20 ppm+±150 ppm+±10 ppm=±180 ppm. The frequency variable range of the voltage-controlled quartz crystal oscillator is expressed by system accuracy+own deviation+secular change=±20 ppm+±50 ppm+±10 ppm =±80 ppm. As seen from the values of both frequency variable ranges, the frequency variable range of the voltage-controlled SAW oscillator is about 100 ppm larger than that of the voltage-controlled quartz crystal oscillator.
(3) The supply voltage to the oscillation circuit of the clock converter is decreasing in voltage in response to recent lower power consumption. Specifically, the present dominant supply voltage is 3.3 V; however, there is a strong trend to lower supply voltage (e.g. 2.5 V). When the supply voltage is lowered, the control voltage for varying the frequency of the clock signal cannot be greatly varied, thus the necessary frequency variable range is decreased and a possibility of not satisfying the specification of the system accuracy exists. This is also the problem that prevents the requirement for increasing the specification of the system accuracy from being met.
This problem is common to both the voltage-controlled SAW oscillator and the voltage-controlled quartz crystal oscillator. Particularly, the voltage-controlled SAW oscillator has such large self-caused frequency fluctuation that it is difficult to ensure the frequency variable range, thus preventing the system accuracy from being met.
(4) The conventional voltage-controlled oscillators (VCOs) and clock converters using the same have increased in size because of the characteristic and structure, thus having the problem that they cannot respond to the recent requirements for micro-miniaturization and low cost.
This problem will be specifically described.
(4-1) The AT quartz crystal resonator constructing the conventional voltage-controlled quartz crystal oscillator 1D shown in FIG. 23 generates complex vibrations or an unnecessary unwanted mode (or unnecessary vibrations) when secondary vibrations approach to overlap principal vibrations depending on the temperature condition. The multiplexer circuit 82 generates harmonic signals in response to the principal vibrations, from which it selects a necessary harmonic wave as a specified high-frequency signal, thereby converting the frequency. At that time, unnecessary harmonic waves are sometimes left as noise depending on the frequency bands and their level. Consequently, the coupling of the unnecessary vibrations, the unnecessary unwanted mode caused by the AT quartz crystal resonator and the unnecessary harmonic waves generated by the multiplexer circuit 82 become the cause of jitter, thus posing the problem of increasing the jitter of outputted clock signals.
(4-2) The conventional voltage-controlled quartz crystal oscillator 1D, shown in FIG. 23, has the possibility of increasing in size since it requires the multiplexer circuit 82 and the differential conversion circuit 83. As shown in FIG. 1 of JP-A-6-061846 (Paragraph 0006, FIG. 1), the voltage-controlled oscillator additionally needs the capacitive reactance circuit 5 for temperature compensation which includes a variable capacitance diode 51, an inductance 52 and so on, to compensate the temperature change of the equivalent inductance of a SAW resonator 2. Therefore, the increase of the number of components disadvantageously increases the size of the voltage-controlled oscillator.
(4-3) Also the clock converter 50b shown in FIG. 24 has the following structural problems: Since both of a feedback-loop (hereinafter, simply referred to as a “feedback loop”) output signal of a PLL-circuit and an output signal of the clock converter 50b are used as the output of the voltage-controlled SAW oscillator, the buffer circuit 56 is needed for reducing the interaction with a load circuit (not shown). This produces the possibility of increasing the size of the clock converter, as in the above. The phase synchronization circuit shown in FIG. 1 of JP-A-5-110427 (Paragraph 0010, FIG. 1) also adopts the structure in which the output signal of a voltage-controlled oscillator 104 serves as both the feedback-loop output signal and the output signal of the phase synchronization circuit, thus having the problem of requiring the buffer circuit, as in the above-described clock converter.
The present invention has been made to solve the above problems. Accordingly, the objects of the invention include the following:
(1) To provide a voltage-controlled oscillator having reduced frequency fluctuations caused from itself and having a small control voltage width.
(2) To provide a voltage-controlled oscillator without the need for a multiplexer circuit and a differential conversion circuit for obtaining a high-frequency oscillation signal and for a dedicated circuit for frequency temperature compensation, thereby achieving micro-miniaturization and low cost.
(3) To provide a voltage-controlled oscillator, in which unnecessary vibration coupling and unwanted mode caused by an oscillation source and unnecessary harmonic waves from a multiplexer circuit are eliminated to reduce jitter.
(4) To provide a clock converter including a voltage-controlled oscillator with little frequency fluctuation and requiring no external buffer circuit.
(5) To provide an electronic device using a micro-miniaturized low-cost clock converter with a narrow control voltage width and reduced jitter, such as an optical network communication device.